Diploma Course in VLSI DESIGN

Overview:

In this course we focus to build an effective FPGA design using synchronous design techniques, instantiate appropriate device resources, use proper HDL coding techniques, make good pin assignments, set basic XDC timing constraints, and use the ISE Design Suite to build, synthesize, implement, and download a design. Generate the instruction ROM for a PicoBlaze design using CORE Generator, initialized with instructions generated from the PicoBlaze assembler. Download and test in hardware. Use the ChipScope-Pro tool to debug a simple PicoBlaze design using an Integrated Logic Analyzer (ILA) core.

Skills Gained:

After completing this course, you will how to:

  • Describe the general FPGA architectures and the design flow
  • Configure FPGA architecture features, such as DCM, using the Architecture Wizard
  • Communicate design timing objectives through the use of global timing constraints
  • Pinpoint design bottlenecks using the reports
  • Utilize synthesis options to improve performance
  • Understand the various implementation options
  • Create and integrate IP cores into your design flow using CORE Generator™ software
  • Use ChipScope™ Pro tool to perform on-chip verification

Syllabus:

1. Introduction to VLSI

  • VLSI Design Flow
  • ASIC vs FPGA
  • RTL Design Methodologies
  • Introduction to ASIC Verification Methodologies
  • Applications of VLSI

2. Advanced Digital System Design

  • Introduction to Digital Electronics
  • ALU circuits
  • Data processing circuits
  • Universal Logic Elements
  • Combinational circuits – Design and Analysis
  • Latches and Flip Flops
  • Shift Registers and Counters
  • Sequential circuits – Design and Analysis
  • Memories and PLD
  • Finite State Machine

3. Verilog HDL

  • Introduction to Verilog
  • Applications of Verilog
  • Verilog language constructs
  • Abstraction levels
  • Data types
  • Verilog operators
  • Declarations - module, ports types
  • Nets and Registers
  • Arrays
  • Memory modeling
  • FSM –structure, moore vs mealy, coding styles, registered outputs
  • Gate level design
  • Data flow design – assign statements
  • Structural design
  • Behavioral design – procedural statements, always blocks
  • Initial blocks, begin…end, fork…join, blocking and non-blocking
  • Procedural control statements – if, case, loops
  • Tasks, Functions
  • Testbenchs
  • Advanced topics – system tasks, compiler directives, UDP
  • File input and File output

4. FPGA DESIGN

  • Basic FPGA Architecture
  • Xilinx Tool Flow.
  • Architecture Wizard and Pins Assignment
  • Reading Reports
  • Global Timing Reports
  • FPGA Design Techniques
  • Synchronous Design Techniques
  • ISIM simulator
  • Synthesis Techniques with Xilinx Synthesis Technology (XST)
  • Implementation Options
  • Core Generator System
  • CORE Generator Software
  • ChipScope-Pro Tool

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ABOUT US

Welcome to ‘Wiztech Automation’ - a premier institute for higher learning in VLSI, Embedded System And PLC technologies. Wiztech Automation deliver the VLSI training courses in Chennai for students and working professionals who are pursuing a career in VLSI Core. VLSI Training ( Verilog, VHDL, FPGA Design, ASIC Design, System Verilog (VMM, OVM, UVM), CMOS Design Basics ).

VISITORS

CONTACT

  • Email id: wiztechenquiry@gmail.com

  • Website: www.vlsitraininginchennai.com

  • Website: www.embeddedtraining.co.in

  • Tel No: 044 - 2620 9369

  • Mobile :+91 99404 26826

ADDRESS

  • Wiztech Automation Solutions Pvt Ltd,
    102, W-Block, 2nd Floor, 2nd Avenue,
    (Next to Indian Bank), Anna Nagar,
    Chennai, Tamil Nadu, India
    Pincode : 600 040.
    Landmark : Anna Nagar Rountana.