Certified Course - II in VLSI DESIGN


This certified course - II is a thorough introduction to the VLSI, Advanced Digital System Design concepts and Verilog language for designing digital design modules. The emphasis is on writing solid simulation code to write a viable testbench. Structural, register transfer level (RTL), and behavioral coding styles are covered. This class addresses to simulate the design general and writing testbench for the specified design. The information gained can be applied to any digital design by using a top-down design approach. This course combines insightful lectures with practical lab exercises to reinforce key concepts. You will also learn best coding practices that will increase your overall Verilog proficiency and prepare you for the advanced verilog topics. This course covers Verilog 1995 and 2001.

Skills Gained:

After completing this course, you will how to:

  • Write RTL Verilog code for digital system design
  • Write Verilog test fixtures for simulation
  • Create a Finite State Machine (FSM) by using Verilog
  • Use scalar and composite data types to represent information
  • Use concurrent and sequential control structure to regulate information flow
  • Write a Verilog testbench and identify simulation-only constructs
  • Create and manage designs within the mentor graphics tool environment


1. Introduction to VLSI

  • VLSI Design Flow
  • ASIC vs FPGA
  • RTL Design Methodologies
  • Introduction to ASIC Verification Methodologies
  • Applications of VLSI

2. Advanced Digital System Design

  • Introduction to Digital Electronics
  • ALU circuits
  • Data processing circuits
  • Universal Logic Elements
  • Combinational circuits – Design and Analysis
  • Latches and Flip Flops
  • Shift Registers and Counters
  • Sequential circuits – Design and Analysis
  • Memories and PLD
  • Finite State Machine


  • Introduction to VHDL
  • Applications of VHDL
  • VHDL language concepts
  • Abstraction levels
  • Data types
  • Verilog operators
  • Declarations - module, ports types
  • Nets and Registers
  • Arrays
  • Memory modeling
  • Gate level design
  • FSM –structure, moore vs mealy, coding styles, registered outputs
  • Data flow design – assign statements
  • Structural design
  • Behavioral design – procedural statements, always blocks
  • Initial blocks, begin…end, fork…join, blocking and non-blocking
  • Procedural control statements – if, case, loops
  • Tasks, Functions
  • Testbenchs
  • Advanced topics – system tasks, compiler directives, UDP
  • File input and File output


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  • Website: www.vlsitraininginchennai.com

  • Website: www.embeddedtraining.co.in

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